Micron Technology Incorporated has began sampling the industry’s first universal flash storage (UFS) multichip package (uMCP) with low-power DDR5 (LPDDR5) DRAM. The uMCP provides high-density and low-power storage designed to fit on slim and compact midrange smartphone designs.
Micron’s new uMCP5 packaging builds on the company’s innovation and leadership in multichip form factors. Micron uMCPs combine low-power DRAM with NAND and an onboard controller, using 40 percent less space compared to a two-chip solution. This optimised configuration saves power, reduces memory footprint and enables smaller and more agile smartphone designs.
“Featuring the latest LPDRAM and UFS interface, this first-in-the-industry packaging solution offers a 50 percent increase in memory and storage bandwidth while reducing power,” said Dr. Raj Talluri senior vice president and general manager at Micron. “Our new uMCP5 package enables midrange 5G smartphones to operate with the ultra-low latency response times and low power modes necessary to support flagship smartphone features such as multiple high-resolution cameras, multiplayer gaming and AR/VR applications.”
Micron’s uMCP5 uses advanced 1y nm DRAM process technology and the world’s smallest 512Gb 96L 3D NAND die. The 297-ball grid array (BGA) package supports two-channel LPDDR5 with speeds up to 6,400Mbps, a 50 percent performance increase over the previous-generation interface. The new package also provides the highest storage and memory density available for uMCP form factors in the market today, at 256GB and 12GB, respectively.
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